Job Description

In Q4 2023, Intel announced PSG will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.

Come join Altera working on Transaction Level Modeling for next generation FPGA and Structured ASIC technologies using Simics and SystemC. The Configuration and Embedded Solutions team is seeking an experienced modeler to help define and implement our pre-Silicon and customer deliverables for future solutions supported by our FPGA and Structured ASICs. This forward-looking and highly dynamic role provides unique opportunities to influence future product direction across several technologies and organizations while fundamentally driving advanced shift-left activities.

The role requires a self-starter with strong interpersonal communication, collaboration, and pathfinding skills along with a broad understanding of digital design and modeling. Experience in Intel FPGAs and Structured ASICs would be a distinct advantage.

In this role, you will have the opportunity to work directly with Silicon design teams, CAD tool teams, applications engineering and planning to define and influence new FPGA product development to drive holistic customer solutions that meet market requirements and delight customers.

Qualifications

Relevant experience can be obtained through schoolwork, classes, project work, internships or military experiences. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement:

Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or related field.

Minimum Qualifications:

7+ years of experience in digital design, digital verification, and at least 5 years in transaction level modeling such as languages such as SystemC, DML, or System Verilog.

Preferred Qualifications:

8+ years of experience in transaction level modeling using languages such as SystemC, DML, or SystemVerilog.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, San Jose

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

Annual Salary Range for jobs which could be performed in US, California: $162,041.00-$259,425.00

*Salary range dependent on a number of factors including location and experience

Working Model

This role will require an on-site presence.